Clock SOP 2.1.2

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2. 示波器設定 DDR3 1333 DDR3 1066 DDR3 800 DDR2 800 DDR2 667 TDS6124C 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt DSA70804 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt TDS6804B 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt TDS6604 1us/div, 50ps/pt 1us/div, 50ps/pt 1us/div, 50ps/pt 1us/div, 50ps/pt 1us/div, 50ps/pt 1us/div, 50ps/pt DDR2 533 20us/div, 25ps/pt 20us/div, 25ps/pt voltage scale:( at least 7 divisions in amplitude);

trigger level:0V mode: run/stop

3. 最小化TekScope，點擊DDR2_CLK-Jitter中的

，自動獲取Scope波形量測。

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CLOCK量測標準程序

版本說明............................................................................................................ 02 前置作業............................................................................................................ 03 Test item............................................................................................................ 08

1. Crystal Frequency

2.高速訊號的CLK量測

3.低速訊號的CLK量測

4.DDR上高速訊號的CLK量測 (a) DDR上CLK轉檔量測配置 (b) DDR2方法一：OA轉檔 (c) DDR2方法二：示波器直接獲取 (d) DDR3方法一：OA轉檔 (e) DDR3方法二：示波器直接獲取

Revision: 2.1.2 06/21/10

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版本說明

Revision 2.0 Date 08/08/08 Description Initial release 2.1 12/26/08 Modify: If clock frequency is fail, please use jitter3 to check the spread spectrum and modify the spec. refer to clock frequency in detail. 2.1.1 04/20/09 Update some information. Author: Sherry Cui 2.1.2 06/21/10 Simplify Author: Bell_hu

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一、前置作業

A. 量測設備:

1. Hp HEWLETT 53131A 225MHz counter & Tektronix 1103 TekProbe Power Supply

2. TDS 6604 或 TDS 6124C 或 DSA70804示波器(主要選擇有TDSJIT3程式為主)

TDS 6604

TDS6124C

DSA70804

3. Probe 7240 (Single-ended Probe)

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4. Probe 6245 (Single-ended Probe)

5. Probe 7330 (differential probe)

6. 金針數支與Probe7330可焊頭

7. PCI介面LAN卡

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8. PCI-E X16介面顯示卡

9. PCI-E X1介面LAN卡

二、 Test items

量測項目：CLK量測項目共可分為4大項 1. 各個Crystal Frequency 量測。 2. 高速訊號的CLK量測。 3. 低速訊號的CLK量測。 4. DDR 部分的CLK量測。

1. Crystal Frequency

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3.點擊

，選擇要轉檔文件。

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4.軟件會自動在轉檔文件目錄生成log file;

5.請將轉檔結果和log file(*****_min_max.txt)保存成如下圖檔，貼入report.

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DDR2方法二：示波器直接獲取

量測步驟

1. 在示波器上安裝LabView; TekVISA和DDR2_Refclk_Test

2.打開DDR2_Refclk_Test如下圖設置。

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Configure Sources?Stat Pop Limit on 並且設定為50k

Configure Sources ?Source Autose tAll 選擇ALL ,結束後按下Go to Result

手動設定示波器的解析度。要求:例如: spec要小於<150ps，所以水平解析度的設定要小於30ps(理想上解析度盡量小於5倍)

按下Run/Stop即開始量測

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二PCI_CK_33M_ICH

(其中測項皆與CK_48M_ICH大致相同,除了最後一項jitter以外) 1.jitter:

a. Delay

示波器設置：Herizontial→Delay Mode on→Heriz Delay Time=Clock一個周期

b. 將要量測波形調整成適當大小，去量測波形的Jitter值，使用Meas=>Histog中的Wfm ct、His in Box、

Pk-Pk Func。

2、點選Histog

3、使用Wfm Ct、His in

c. 再去累積波形: 按Disp→infinite

Box、Pk-Pk

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d. 請將Trigger調至1.5V，將測量範圍設在1.5V，再累積至Jitter值不在抖動，調節Scale使得Hits點

數是累積張數的1～2倍，再累積至Jitter值不再抖動（至少應累積1K張），將值記錄下來.

累積張數

Max. sync period

Min. Sync Period

三PCI_CK_33M_SIO

(其中量測項目皆與上述抓法相同,請參考前述低速Clk之量測,請注意note所述各條訊號所該標示的位置,有些線並不相同)。

四PCI_CK_33M_1394

(其中量測項目皆與上述抓法相同,請參考前述低速Clk之量測,請注意note所述各條訊號所該標示的位置,有些線並不相同)。

五PCI_CK_33M_SLT1

(其中量測項目皆與上述抓法相同,請參考前述低速Clk之量測,請注意note所述各條訊號所該標示的位置,有些線並不相同)。

量測點的終端在PCI卡上

其中必須注意，當PCI CLK訊號的Overshoot>4V 或Undershoot<-1V 都要highlight這個問題

六CK_14M_ICH

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(其中量測項目皆與上述抓法相同,請參考前述低速Clk之量測,請注意note所述各條訊號所該標示的位置,有些線並不相同)。

七CK_14M_SIO

(其中量測項目皆與上述抓法相同,請參考前述低速Clk之量測,請注意note所述各條訊號所該標示的位置,有些線並不相同)。

八AZALIA_24M_BITCLK (CODEC)

(其中量測項目皆與上述抓法相同,請參考前述低速Clk之量測,請注意note所述各條訊號所該標示的位置,有些線並不相同)。

4. DDR上高速訊號的CLK量測

DDR上CLK轉檔量測配置

1.示波器：TPE--TDS6124C;DSA70804;TDS6604;

SZ----TDS6804B

2.探棒：P7330

3.軟件：Serious Sam (量測DDR上的CLK需要進入OS執行Serious Sam)

一、M_CHA_CLK1, M_CHA_CLK1#

1. Cycle Time/Low/High Width: 現已無需單獨量測，直接從Clk_Jitter測試結果里面讀值（僅限DDR端）。

如下：

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2.VID: Math?選ch1-ch2?再選擇Meas?開max,min可得結果

3.VIL(dc)/ VIH(dc): 開glitch?Neg?選小於,如果glitch trigger抓不到glitch可使用Edge trigger來抓 開glitch?Pos?選小於,如果glitch trigger抓不到glitch可使用Edge trigger來抓

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4. Rise/Fall Rate: Rising slew rate is measured between 0.5V and -0.25V with differential probe.

Falling slew rate is measured between 0.25V and -0.5V with differential probe. , 注意其單位為V/ns

5.Overshoot/Undershoot: 如下圖去Trigger可得其值

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6. Period Jitter/ C to C Jitter/TERR(2per)/TERR(3per)/TERR(4per)/TERR(5per) TERR(10per)/TERR(50per)/Pos/Neg C-C Duty Jitter: 軟件：

TekVISA3.3.0 LabView8.2

DDR2_Clk_Jitter_V1.2 DDR3_Clk_Jitter_V2.0

量測要求： Acquisition: 50K,

Sample Rate: 25ps/pt或50ps/pt

示波器設定: 以TDS6124C, DDR3 1333為例, 示波器設定計算方式如下

DDR3 1333 =>Clock period=1.5ns => 1.5ns*50K=75us => horizontal scale如設定為10us/div, 則time duration為100us => 100us/25ps=4M, TDS6124C有32M memory =>量測DDR3 1333 clock時, 利用DDR3_Clk_Jitter_v2.00控制CH1, 示波器可設定為10us/div, 25ps/pt, 僅需量測一次即可累積50K acquisitions 示波器設定: 以TDS6604, DDR2 667為例, 示波器設定計算方式如下

DDR2 667 =>Clock period=3ns => 3ns*50K=150us => horizontal scale如設定為20us/div, 則time duration為200us => 200us/50ps=8M, TDS6604有250K memory => 50ps*250K=12.5us, time duration可設定為10us =>量測DDR2 667 clock時, 利用DDR2_Clk_Jitter_v1.20控制CH1, 示波器可設定為1us/div, 50ps/pt DDR3 1333 DDR3 1066 DDR3 800 DDR2 800 TDS6124C 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt DSA70804 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt TDS6804B 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt TDS6604 1us/div, 50ps/pt 1us/div, 50ps/pt 1us/div, 50ps/pt 1us/div, 50ps/pt 華碩電腦 ASUSTeK Computer, Inc. 4/16/2013 57973610.doc

DDR2 667 DDR2 533

20us/div, 25ps/pt 20us/div, 25ps/pt 38/70 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 1us/div, 50ps/pt 1us/div, 50ps/pt DDR2方法一：OA轉檔

量測步驟 1. 示波器設定： DDR3 1333 DDR3 1066 DDR3 800 DDR2 800 DDR2 667 DDR2 533 TDS6124C 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt DSA70804 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt TDS6804B 10us/div, 25ps/pt 10us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt 20us/div, 25ps/pt voltage scale:( at least 7 divisions in amplitude); trigger level:0V mode: single trigger

2.選擇菜單欄File? Export Setup….選擇將檔案存成 .csv file。

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轉檔步驟

1. 在OA上安裝LabView8.2; TekVISA3.3.0和DDR2_Refclk_Test

2.打開DDR2_Refclk_Test如下圖設置。

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