Instruction set compiled simulation A technique for fast and(4)

The IS-CS technique achieves its superior performance for two reasons:moving time-consuming decode to compile time,and using templates to produce aggressively optimized code for each instance of instructions.We demonstrated per-formance improvement of upto40%over the best published results on an ARM7model.

Future work will concentrate on using this technique for modeling other real world architectures using an architec-ture description language to demonstrate the retargetability of this approach.

6.ACKNOWLEDGMENTS

This work was partially supported by NSF grants CCR-0203813and CCR-0205712.We would like to acknowledge members of the ACES laboratory for their inputs.7.REFERENCES

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