linux系统下ncverilog的详细命令(2)

来源:网络收集 时间:2025-06-21 下载这篇文档 手机版
说明:文章内容仅供预览,部分内容可能不全,需要完整文档或者需要复制内容,请下载word后使用。下载word有问题请添加微信号:xuecool-com或QQ:370150219 处理(尽可能给您提供完整文档),感谢您的支持与谅解。点击这里给我发消息

+ncintermod_path Make interconnects be multisource capable +nclexpragma Enable lexical pragma processing

+nclib_binding Defaults back to the IUS5.4 binding search order +nclibcell Mark all cells with `celldefine

+nclibdirname+

Specify directory name to store created library +nclibdirpath+ Relative path where libraries should be created +nclibmap+ Specify the library mapping file

+nclibname+ Specify the name of a library to search +nclicq Queue simulation till license is available +nclinedebug Enable line debugging capabilities

+nclist Produce a VHDL source listing in specified file +nclog_ncelab+ Place the ncelab output into specified logfile +nclog_ncsc_run+ Place the ncsc_run output into specified logfile +nclog_ncsim+ Place the ncsim output into the specified logfile +nclog_ncvhdl+ Place the ncvhdl output into specified logfile +nclog_ncvlog+ Place the ncvlog output into specified logfile +nclog_svpp+ Place the svpp output into specified logfile

+nclps_assign_ft_buf Disable continuous assignment as feed through net +nclps_cpf+ Specify a CPF file for low power simulation +nclps_iso_off Turn off port isolation

+nclps_logfile+ Specify a log file for low power simulation +nclps_off Turn off low power simulation +nclps_rtn_lock Lock the retained reg value +nclps_rtn_off Turn off state retention

+nclps_simctrl_on Enable runtime control over low power simulation +nclps_stime+

+nclps_verbose+ Specify a level of information reporting +nclps_verify Enables automatic Low Power verification +nclps_vhdlpwron Brings back VHDL objects to a defined state +ncls_all Run ncls with the -all option +ncls_dep Run ncls with the -dep option +ncls_so Run ncls with the -source option +ncls_ss Run ncls with the -snapshot option

+ncmakelib+ Compile HDL files into specified library

+ncmatchinst+ Specify name of instance to match for -INSERT +ncmaxdelays Select maximum delays for simulation +ncmindelays Select minimum delays for simulation +ncmodelincdir+ Specify a list of directories separated by :

+ncmodelpath+ For Verilog-AMS, specify list of source files +ncmultview Allows selection of arch/config for binding

+ncnamemap_mixgen Do name mapping from VHDL generics to Vlog params +ncno_cross_def_bind Suppress cross-language default binding +ncno_notifier Ignore notifiers in timing checks

+ncno_sdfa_header Do not print the SDF annotation header

+ncno_tchk_xgen Turn off X-generation in VITAL timing checks +ncno_vpd_msg Turn off VITAL pathdelay warnings

+ncno_vpd_xgen Turn off X-generation in VITAL pathdelays +ncnobinding+ Skip instances of unit given as argument +ncnobuiltin Do not use any built-in IEEE operators

+ncnocifcheck Disables constraint checking in VDA functions +ncnocopyright Suppress printing of copyright banner +ncnodeadcode Turn off dead code optimization +ncnoesp Disable edge-sensitive iopath delays +ncnoipd Ignore interconnect delays

+ncnokey Suppress generation of the default keyfile +ncnolicpromote Do not use a mixed language license

+ncnolicsuspend Disable suspending licenses for SIGTSTP +ncnoline Do not locate source line on errors

+ncnolog Suppress generation of the default logfile +ncnomempack Do not pack memories

+ncnomxindr Do not generate NOMXINDR error; split net instead +ncnontcglitch Suppress delayed net glitch suppression message +ncnoparamerr Do not flag setting undefined parameters as error +ncnopragmawarn Disable pragma related warning messages. +ncnoscynceverydelta Turn Delta cycle accuracy off

+ncnosncomp Do not compile Specman input files

+ncnosource Do not check source file timestamps in update +ncnospecview Do not invoke the Specview GUI +ncnostdout Turn off output to screen (terminal)

+ncnotimezeroasrtmsg Suppress printing of time zero assert messages +ncnovitalaccl Turn off VITAL acceleration

+ncnovitalcheck Suppress VITAL compliance checking +ncnowarn+ Disable printing of the specified warning +ncnoxilinxaccl Turn off Xilinx acceleration

+ncntc_level+ Select NTC algorithm 1 or 2 (default is 2)

+ncntc_verbose Display verbose information about NTC process +ncntcnotchks Generate NTC delay while removing timing checks +nco_ext+ Override extensions for object files

+ncomicheckinglevel+ Specify OMI checking level {Min, Std, Max} +ncoverride_precision Override the timescale precision in Verilog +ncoverride_timescale Override the timescale directives in Verilog

+ncpassword Prompt for sim passwd for SimVis walkup connect +ncpli_export Export symbols from loadpli, loadvpi

+ncpliverbose Print information for PLI/VPI task registration +ncppdb+ Invoke the post-processing environment +ncppe Enter post-processing mode +ncpragma Enable pragma processing

+ncpreserve Preserves resolution of single-driver sigs +ncprofile Generate a run-time profile of the design +ncprofoutput+ Specify an output file for profiling data +ncprofthread Allow threaded processes to profile

+ncpromt Prompts to select arch/config/view for entity/mod +ncpropspath+ Specify analog occurrence property database file +ncrandwarn Enable all SV randomize failure warnings +ncredmem Use reduced memory image size

+ncreflib+ Add the library to the list of libraries searched +ncrelax Enable relaxed VHDL interpretation +ncrun Begin simulation automatically

+ncs_ext+ Override extensions for assembly files

+ncsavechoice+ Specify name of file in which to save bindings +ncsaveenv Save the shell environment variables -ncsc_msgs Tell ncsc to run ncsc messages on or off +ncscargs+ Pass arguments to ncsc_run

+ncscope_discipline+ Specify one scope based discipline

+ncscparameter+ Associates values with top level SystemC params +ncscprocessorder+ Allow System C process order to vary

+ncscscreateviewables Create ncsc_viewable objs inserted by ncsc_wizard +ncscynceverydelta+on|off Turn Delta cycle accuracy on

+ncsdf_cmd_file+ Specify file of SDF annotation commands +ncsdf_nocheck_celltype Do not check the accuracy of CELLTYPE field +ncsdf_nortis Disable retain input sense

+ncsdf_precision+ Specify precision which SDF data will be modified +ncsdf_simtime Allow SDF annotation during simulation +ncsdf_verbose Include detailed information in SDF log file +ncsdf_worstcase_rounding Truncate SDF min delays, round max +ncsdfnowarn Do not report SDF warnings

+ncseq_udp_delay+ Specify a constant delay for sequential UDPs +ncsetdiscipline+ Set discipline for a specified scope.

+ncshare Reuse any available view with NCUID

-ncsim_args, Pass arguments to simulator. (ncsc_run compat) +ncsimargs+ Pass arguments to simulator

+ncsimcompatible_ams+ Specify compatibility language hspice or spectre +ncsimexe+ Specify simulator with statically linked PLI +ncsimfile File for generated sim options from import +ncsmartlib Specifies multiple library compilation in OIC +ncsmartorder Order-independent compilation (OIC) for VHDL +ncsmartscript+

Copyright © 2020-2025 70教育网 版权所有
声明 :本网站尊重并保护知识产权,根据《信息网络传播权保护条例》,如果我们转载的作品侵犯了您的权利,请在一个月内通知我们,我们会及时删除。
客服QQ:370150219 邮箱:370150219@qq.com
苏ICP备16052595号-17
Top
× 游客快捷下载通道(下载后可以自由复制和排版)
单篇付费下载
限时特价:7 元/份 原价:20元
VIP包月下载
特价:29 元/月 原价:99元
低至 0.3 元/份 每月下载150
全站内容免费自由复制
VIP包月下载
特价:29 元/月 原价:99元
低至 0.3 元/份 每月下载150
全站内容免费自由复制
注:下载文档有可能“只有目录或者内容不全”等情况,请下载之前注意辨别,如果您已付费且无法下载或内容有问题,请联系我们协助你处理。
微信:xuecool-com QQ:370150219